Guest lecture by Christian Mayr (TU Dresden)

BrainLinks-BrainTools is inviting all members, colleagues and friends to a guest lecture given by Prof. Dr. Christian Mayr from the Technische Universität Dresden:

Topic: MPSoC systems for implants: flexible, low-power local processing and sensory interfacing

State-of-the-art Multi-Processor-Systems-on-Chip (MPSoC) combine digital processing, sensor interfacing and high-speed data communication in a single, small footprint silicon die. MPSoCs have also become very power-efficient, as they tend to be used in mobile applications such as automotive sensor nodes, smartphone subsystems, etc. Based on our work on neuromorphic biohybrids and industrial MPSoCs (Down to 22nm CMOS), I see significant potential in applying MPSoC philosophy to implantable systems.

Such a system would contain AD and DA converters for recording and stimulation, a CPU for general-purpose computation plus specific (bio-)processing enhancements, local memory (Flash/RAM) and a digital interface to a host PC. All subsystems would be built according to the agressive low-power methodology developed at my chair, enabling an optimal compromise between required processing power and the natural power budget limitation of implants.

This approach puts custom processing power and programmability in local nodes, enhancing current systems with a number of new capabilities:

• Sufficient local 'intelligence' to perform closed loop feedback (e.g. electronic depth control)
• Neuromorphic processing via flexible code representations of neurons and synapses (similar to the SpiNNaker system)
• Data logging & data compression (spike sorting, DSP functionality, storage for off-line readout)
• Very small footprint wire interface to a host PC. For instance, we currently develop an interface that transmits bidirectional GBit Ethernet and power over just 2 wires without shielding
• A high flexibility sensory interfacing IC, able to be mated to multiple shanks. This can be achieved through programmable AD/DA converters and on-chip FPGA ressources·   
  

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